Collection
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Convex C1 XP
System
| Company: | Convex |
| Introduction: | 1986 |
| Maximum memory size: | 1GB |
| Maximum number of CPUs: | 1 |
| uses architecture: | Convex C-Series |
| can contain: | Convex C1 CPU |
| System class: | Supercomputer |
| Contains: | Convex C1 CPU |
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Convex C1 XL
System
| Company: | Convex |
| Introduction: | 1986 |
| Maximum number of CPUs: | 1 |
| uses architecture: | Convex C-Series |
| can contain: | Convex C1 CPU |
| System class: | Supercomputer |
| Contains: | Convex C1 CPU |
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Intel iPSC/860
System
| Company: | Intel |
| Introduction: | 1990 |
| Maximum number of CPUs: | 128 |
| uses architecture: | i860 |
| can contain: | Intel i860 |
| System class: | Supercomputer |
| Contains: | 16 * Intel i860 |
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Vector Processor
CPU Architecture Class
| cpu architecture in this class: | Ardent Titan |
| cpu architecture in this class: | Convex C-Series |
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Ardent Titan
CPU Architecture
| architecture used in: | Ardent Titan |
| can be contained in: | Ardent Titan |
| cpu using this architecture: | Ardent Titan P2 (R2K based) |
| cpu using this architecture: | Ardent Titan P3 (R3K based) |
| cpu architecture class: | Vector Processor |
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Convex C-Series
CPU Architecture
| Word size: | 64 |
| architecture used in: | Convex C1 XP |
| architecture used in: | Convex C1 XL |
| architecture used in: | Convex C3880 |
| architecture used in: | Convex C220 |
| architecture used in: | Convex C240 |
| cpu using this architecture: | Convex C1 CPU |
| cpu using this architecture: | Convex C2 CPU |
| cpu architecture class: | Vector Processor |
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i860
CPU Architecture
| architecture used in: | Intel iPSC/860 |
| cpu using this architecture: | Intel i860 |
| cpu architecture class: | RISC (Reduced Instruction Set Computer) |
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Intel i860
CPU Chip
| Company: | Intel |
| Introduction: | 1989 |
| can be contained in: | Intel iPSC/860 |
| cpu architecture class: | RISC (Reduced Instruction Set Computer) |
| cpu architecture: | i860 |
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Siemens RM 200 C
System
| Company: | Siemens () |
| Bus: | PCI, EISA |
| Introduction: | 1994 |
| Maximum memory size: | 256MB |
| Maximum number of CPUs: | 1 |
| uses architecture: | MIPS (Microprocessor without Interlocked Pipeline Stages) |
| runs os: | Microsoft Windows NT |
| runs os: | Siemens SINIX / Reliant UNIX |
| can contain: | QED R4700 |
| System class: | Desktop |
| Contains: | QED R4700 |
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QED R4700
CPU Chip
| Company: | QED (Quantum Effect Devices) |
| Endianness: | bi |
| Introduction: | 1994 |
| Technology: | 500nm CMOS |
| Word size: | 32/64 |
| can be contained in: | Siemens RM 200 C |
| cpu architecture class: | RISC (Reduced Instruction Set Computer) |
| cpu architecture: | MIPS (Microprocessor without Interlocked Pipeline Stages) |
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LSI Logic S1C0010
CPU Chip
| Company: | LSI Logic |
| Endianness: | bi |
| Introduction: | 1989 |
| Word size: | 32/64 |
| can be contained in: | Sun SPARCstation IPC (4/40) |
| cpu architecture class: | RISC (Reduced Instruction Set Computer) |
| cpu architecture: | SPARC (Scalable Processor Architecture) |
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Sun SPARCstation IPC (4/40)
System
| Company: | Sun (Sun Microsystems) |
| Bus: | SBus, 2 slots |
| Introduction: | 1989 |
| Maximum memory size: | 48MB |
| Maximum number of CPUs: | 1 |
| uses architecture: | SPARC (Scalable Processor Architecture) |
| can contain: | LSI Logic S1C0010 |
| System class: | Workstation |
| Contains: | LSI Logic S1C0010 |
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HP 9883A Paper Tape Reader
System
| Company: | HP (Hewlett-Packard) |
| Type of peripheral: | Storage |
| peripheral type: | Storage |
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CDC Cyber 176
System
| Company: | CDC (Control Data Corporation) |
| has artefact: | CDC Cyber 176 Core memory module |
| System class: | Supercomputer |
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Intel Montecito (Itanium 9000)
CPU Chip
| Company: | Intel |
| Endianness: | little |
| Introduction: | 2006 |
| Structure: | dual core with hyper threading |
| Technology: | 90nm CMOS |
| Word size: | 64 |
| cpu architecture class: | EPIC (Explicitly Parallel Instruction Set Computer) |
| cpu architecture: | IA64 (Itanium) |
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