Collection
![](/plugins/content/jlexcomment/assets/icon.png)
Fairchild C100
CPU Chip
Company: | Fairchild |
Introduction: | 1986 |
Word size: | 32 bit |
cpu architecture class: | RISC (Reduced Instruction Set Computer) |
cpu architecture: | Clipper |
- Details
![](/plugins/content/jlexcomment/assets/icon.png)
Intergraph C300
CPU Chip
Company: | Intergraph |
Introduction: | 1988 |
Word size: | 32 bit |
can be contained in: | Intergraph InterPro 6000 |
can be contained in: | Intergraph InterPro 2400 |
cpu architecture class: | RISC (Reduced Instruction Set Computer) |
cpu architecture: | Clipper |
- Details
![](/plugins/content/jlexcomment/assets/icon.png)
DEC DNARD "Shark" Prototype
System
Company: | DEC (Digital Equipment Corporation) |
Introduction: | 1997 |
Maximum memory size: | 64MB |
Maximum number of CPUs: | 1 |
uses architecture: | ARM (Acorn RISC Machine) |
can contain: | DEC StrongARM SA-110 |
System class: | Desktop |
Contains: | DEC StrongARM SA-110 |
- Details
![](/plugins/content/jlexcomment/assets/icon.png)
DEC StrongARM SA-110
CPU Chip
Company: | DEC (Digital Equipment Corporation) |
Endianness: | bi |
Introduction: | 1996 |
Structure: | scalar, in-order, 5-stage pipeline |
Technology: | 350nm CMOS, 2.5 million transistors |
Word size: | 32/64 |
can be contained in: | DEC DNARD "Shark" Prototype |
can be contained in: | MicroDigital Omega1 |
cpu architecture class: | RISC (Reduced Instruction Set Computer) |
cpu architecture: | ARM (Acorn RISC Machine) |
- Details
![](/plugins/content/jlexcomment/assets/icon.png)
DEC AlphaServer 1000
System
Company: | DEC (Digital Equipment Corporation) |
Bus: | PCI, EISA |
Introduction: | 1995 |
Maximum memory size: | 1GB |
Maximum number of CPUs: | 1 |
uses architecture: | Alpha |
can contain: | DEC 21164 (EV5) |
System class: | Server |
Contains: | DEC 21164 (EV5) |
- Details
![](/plugins/content/jlexcomment/assets/icon.png)
DEC EB64+
System
Company: | DEC (Digital Equipment Corporation) |
Bus: | PCI, ISA |
Maximum number of CPUs: | 1 |
uses architecture: | Alpha |
can contain: | DEC 21064 (EV4) |
System class: | Server |
Contains: | DEC 21064 (EV4) |
- Details
![](/plugins/content/jlexcomment/assets/icon.png)
HP AlphaServer DS15
System
Company: | HP (Hewlett-Packard) |
Bus: | PCI |
Introduction: | 2003 |
Maximum memory size: | 4GB |
Maximum number of CPUs: | 1 |
uses architecture: | Alpha |
can contain: | DEC 21264C (EV68CB) |
System class: | Server |
Contains: | DEC 21264C (EV68CB) |
- Details
![](/plugins/content/jlexcomment/assets/icon.png)
HP AlphaServer DS20L
System
Company: | HP (Hewlett-Packard) |
Bus: | PCI |
Introduction: | 2001 |
Maximum memory size: | 2GB |
Maximum number of CPUs: | 2 |
uses architecture: | Alpha |
can contain: | DEC 21264C (EV68CB) |
System class: | Server |
Contains: | 2 * DEC 21264C (EV68CB) |
- Details
![](/plugins/content/jlexcomment/assets/icon.png)
Atmel AVR Demo Board
System
Company: | Atmel |
Introduction: | 1997 |
Maximum number of CPUs: | 1 |
uses architecture: | AVR |
can contain: | Atmel AT90S1200 |
System class: | CPU Trainer |
Contains: | Atmel AT90S1200 |
- Details
![](/plugins/content/jlexcomment/assets/icon.png)
Atmel AT89/90 Starter Kit
System
Company: | Atmel |
Introduction: | 1997 |
Maximum number of CPUs: | 1 |
uses architecture: | AVR |
can contain: | Atmel AT90S1200 |
System class: | CPU Trainer |
Contains: | Atmel AT90S1200 |
- Details
![](/plugins/content/jlexcomment/assets/icon.png)
Honeywell 4500
System
Company: | Honeywell |
Bus: | GENIEbus |
Introduction: | 1977 |
Maximum memory size: | 4MW |
Maximum number of CPUs: | 1 |
uses architecture: | GE 4000 |
can contain: | Honeywell 45000 MaxP |
can contain: | Honeywell 45000 Turbo |
System class: | Industrial |
- Details
![](/plugins/content/jlexcomment/assets/icon.png)
Honeywell TDC2000
System
Company: | Honeywell |
Bus: | Data Hiway |
Introduction: | 1975 |
Maximum number of CPUs: | 1 |
uses architecture: | CP1600 |
can contain: | GI CP1600 |
System class: | Industrial |
- Details
![](/plugins/content/jlexcomment/assets/icon.png)
Honeywell TDC3000
System
Company: | Honeywell |
Bus: | LCN |
Introduction: | 1984 |
Maximum number of CPUs: | 1 |
uses architecture: | 68000 |
can contain: | Motorola 68020 |
can contain: | Motorola 68040 |
System class: | Industrial |
- Details
![](/plugins/content/jlexcomment/assets/icon.png)
AVR
CPU Architecture
Word size: | 8-bit |
architecture used in: | Atmel AVR Demo Board |
architecture used in: | Atmel AT89/90 Starter Kit |
cpu using this architecture: | Atmel AT90S1200 |
cpu architecture class: | RISC (Reduced Instruction Set Computer) |
- Details
![](/plugins/content/jlexcomment/assets/icon.png)
GE 4000
CPU Architecture
Word size: | 24 |
architecture used in: | Honeywell 4500 |
cpu using this architecture: | Honeywell 45000 Turbo |
cpu using this architecture: | Honeywell 45000 MaxP |
cpu architecture class: | CISC (Complex Instruction Set Computer) |
- Details
![](/plugins/content/jlexcomment/assets/icon.png)
Honeywell 45000 Turbo
CPU Chip
Company: | Honeywell |
Technology: | TTL IC's, bitslice |
Word size: | 24 |
can be contained in: | Honeywell 4500 |
cpu architecture class: | CISC (Complex Instruction Set Computer) |
cpu architecture: | GE 4000 |
- Details
![](/plugins/content/jlexcomment/assets/icon.png)
Honeywell 45000 MaxP
CPU Chip
Company: | Honeywell |
Technology: | Alterra FPGA's |
Word size: | 24 |
can be contained in: | Honeywell 4500 |
cpu architecture class: | CISC (Complex Instruction Set Computer) |
cpu architecture: | GE 4000 |
- Details