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Interdata Model 3
System
| Company: | Interdata |
| Introduction: | 1967 |
| Maximum number of CPUs: | 1 |
| has artefact: | Interdata Model 3 Systems Interface board with plug-ins |
| System class: | Minicomputer |
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LSI Logic S1A0007
CPU Chip
| Company: | LSI Logic |
| Endianness: | bi |
| Introduction: | 1988 |
| Technology: | 1.3 um CMOS, 110,000 transistors |
| Word size: | 32/64 |
| cpu architecture class: | RISC (Reduced Instruction Set Computer) |
| cpu architecture: | SPARC (Scalable Processor Architecture) |
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Sun SparcStation 1
System
| Company: | Sun (Sun Microsystems) |
| Bus: | SBus |
| Introduction: | 1989 |
| Maximum memory size: | 64MB |
| Maximum number of CPUs: | 1 |
| uses architecture: | SPARC (Scalable Processor Architecture) |
| runs os: | Sun SunOS/Solaris |
| can contain: | SPARC (Scalable Processor Architecture) |
| System class: | Desktop |
| Contains: | LSI Logic S1A0007 |
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LSI Logic L64801
CPU Chip
| Company: | LSI Logic |
| Endianness: | bi |
| Word size: | 32/64 |
| can be contained in: | CompuAdd SS 1+ |
| cpu architecture class: | RISC (Reduced Instruction Set Computer) |
| cpu architecture: | SPARC (Scalable Processor Architecture) |
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DEC 21364 (EV7)
CPU Chip
| Company: | DEC (Digital Equipment Corporation) |
| Endianness: | little |
| Introduction: | 2002 |
| Technology: | 180nm CMOS, 125 million transistors |
| Word size: | 64 |
| can be contained in: | HP AlphaServer ES47 |
| cpu architecture class: | RISC (Reduced Instruction Set Computer) |
| cpu architecture: | Alpha |
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Sun MicroSPARC-II
CPU Chip
| Company: | Sun (Sun Microsystems) |
| Endianness: | bi |
| Introduction: | 1994 |
| Technology: | 500nm, 2.3 million transistors |
| Word size: | 32/64 |
| cpu architecture class: | RISC (Reduced Instruction Set Computer) |
| cpu architecture: | SPARC (Scalable Processor Architecture) |
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Intel Harpertown Xeon (5400)
CPU Chip
| Company: | Intel |
| Endianness: | little |
| Introduction: | 2007 |
| Structure: | 4 cores |
| Technology: | 45nm CMOS, 820 million transistors |
| Word size: | 64 |
| can be contained in: | HP BL480c Blade Server |
| cpu architecture class: | CISC (Complex Instruction Set Computer) |
| cpu architecture: | x86_64 |
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Intel Woodcrest Xeon (5100)
CPU Chip
| Company: | Intel |
| Endianness: | little |
| Introduction: | 2006 |
| Structure: | dual-core |
| Technology: | 65nm CMOS |
| Word size: | 64 |
| can be contained in: | HP BL460c Blade Server |
| cpu architecture class: | CISC (Complex Instruction Set Computer) |
| cpu architecture: | x86_64 |
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Sun microSPARC
CPU Chip
| Company: | Sun (Sun Microsystems) |
| Endianness: | bi |
| Introduction: | 1992 |
| Technology: | 800nm CMOS, 0.8 million transistors |
| Word size: | 32/64 |
| can be contained in: | Sun SPARCclassic |
| cpu architecture class: | RISC (Reduced Instruction Set Computer) |
| cpu architecture: | SPARC (Scalable Processor Architecture) |
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MCS-48
CPU Architecture
| Word size: | 8 |
| architecture used in: | TeKaDe FS220Z |
| cpu using this architecture: | Intel 8749 |
| cpu architecture class: | CISC (Complex Instruction Set Computer) |
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Intel 8749
CPU Chip
| Company: | Intel |
| Introduction: | 1976 |
| Structure: | Microcontroller with 2KB ROM and 128 bytes of RAM |
| Word size: | 8 |
| can be contained in: | TeKaDe FS220Z |
| cpu architecture class: | CISC (Complex Instruction Set Computer) |
| cpu architecture: | MCS-48 |
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Intel i486DX2
CPU Chip
| Company: | Intel |
| Endianness: | little |
| Introduction: | 1992 |
| Technology: | 600nm, 1.6 million transistors |
| Word size: | 32 |
| can be contained in: | Apple Performa PC Card |
| cpu architecture class: | CISC (Complex Instruction Set Computer) |
| cpu architecture: | IA32 (Intel Architecture 32-bit) |
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Intel Celeron
CPU Chip
| Company: | Intel |
| Endianness: | little |
| Introduction: | 1998 |
| Technology: | 180nm CMOS, 28 million transistors |
| Word size: | 32 |
| cpu architecture class: | CISC (Complex Instruction Set Computer) |
| cpu architecture: | IA32 (Intel Architecture 32-bit) |
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DEC Rigel (DC520)
CPU Chip
| Company: | DEC (Digital Equipment Corporation) |
| Endianness: | little |
| Introduction: | 1989 |
| Technology: | 1.5um CMOS, 320,000 transistors |
| Word size: | 32 |
| can be contained in: | DEC VAX 4000 |
| cpu architecture class: | RISC (Reduced Instruction Set Computer) |
| cpu architecture: | VAX (Virtual Address eXtension) |
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MTI R3000
CPU Chip
| Company: | MTI (MIPS Technologies, Inc.) |
| Endianness: | bi |
| Introduction: | 1988 |
| Technology: | 1.2um CMOS, 115,000 transistors |
| Word size: | 32/64 |
| can be contained in: | Ardent Titan P3 (R3K based) |
| can be contained in: | DEC DECstation 5000 |
| can be contained in: | DEC DECsystem 5400 |
| can be contained in: | DEC DECsystem 5500 |
| cpu architecture class: | RISC (Reduced Instruction Set Computer) |
| cpu architecture: | MIPS (Microprocessor without Interlocked Pipeline Stages) |
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Motorola 68040
CPU Chip
| Company: | Motorola |
| Endianness: | big |
| Introduction: | 1990 |
| Technology: | 650nm, 1.17 million transistors |
| Word size: | 32 |
| can be contained in: | Apple Macintosh Performa 630 PC |
| can be contained in: | Honeywell TDC3000 |
| cpu architecture class: | CISC (Complex Instruction Set Computer) |
| cpu architecture: | 68000 |
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DEC KD11-E
CPU Chip
| Company: | DEC (Digital Equipment Corporation) |
| Endianness: | little |
| Technology: | Uses four 74181 bit slices and a 74182 look-ahead carry generator |
| Word size: | 16 |
| can be contained in: | DEC PDP-11/34 |
| cpu architecture class: | CISC (Complex Instruction Set Computer) |
| cpu architecture: | PDP-11 (Programmable Data Processor 11) |
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Intel i486
CPU Chip
| Company: | Intel |
| Endianness: | little |
| Introduction: | 1989 |
| Technology: | 1um CMOS, 1.2 million transistors |
| Word size: | 32 |
| can be contained in: | Sun SunPC 486DX |
| can be contained in: | IBM PS/2 Model 77-486 |
| cpu architecture class: | CISC (Complex Instruction Set Computer) |
| cpu architecture: | IA32 (Intel Architecture 32-bit) |
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