Write a commentARM (Acorn RISC Machine)
CPU Architecture
| Endianness: | bi |
| Word size: | 32/64 |
| architecture used in: | DEC DNARD "Shark" Prototype |
| architecture used in: | Psion Series 5mx |
| architecture used in: | MicroDigital Omega1 |
| cpu using this architecture: | DEC StrongARM SA-110 |
| cpu using this architecture: | Cirrus Logic CL-PS7110 |
| cpu architecture class: | RISC (Reduced Instruction Set Computer) |