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CPU Architecture
| Endianness: | little |
| Word size: | 8 |
| architecture used in: | Apple IIc |
| architecture used in: | Apple IIe |
| architecture used in: | MultiTech MicroProfessor I/65 |
| architecture used in: | CHE CHE-1b |
| cpu using this architecture: | WDC 65C02 |
| cpu using this architecture: | MOS 6502 |
| cpu architecture class: | CISC (Complex Instruction Set Computer) |