Part of the Vaxbarn collection is what could very well be the largest collection of Convex supercomputers in the world.
The Convex adventure started in 2016 with an eBay advertisement, and since then the collection has seen the addition of 9 Convex supercomputers, spanning three generations of machines.
1st Generation: Convex C1 (1985)
The Convex C1 is a single-cpu vector machine, very similar in design to the Cray-1, but implemented in slower, less expensive CMOS technology. At a 10MHz clock speed, it delivered about a quarter of the performance of the Cray-1 at less that 1/10th of the price.
|A Convex C1 XL, a smaller, single-cabinet follow-on to the original C1. This machine is missing some vital parts and therefore does not work.||A Convex C1 XP, a rebranding of the original C1, with support for larger main memory. One cabinet contains the CPU, while a second cabinet contains a tapedrive and disk drives. The service processor in this machine runs, and after our restoration (see Convex C1 XP Service Processor power-on - Getting a Convex C1 to pass all diagnostics - Convex C1 Power Supply Replacement) the system passes all diagnostics, but is missing its main hard drive, and therefore does not boot. I do have tape backups of the main disks contents (see Convex C1 Filesystem Dumps), so once I source a compatible disk, I may be able to boot this machine.|
2nd Generation: Convex C2 (1988)
The Convex C2 (C2x0, later C32x0) is a crossbar-interconnected multi-processor (maximum of 4 cpus) vector machine. The processors are compatible with the C1, but mostly implemented in faster - and much more power-hungry- ECL technology, boosting the clock speed to 25 MHz.
The Convex C2 generation is present with two specimens:
|A Convex C220, a dual-cpu machine. This machine has been fully restored (see Arrival of the C220 - Initial Convex C220 Checkout - Restoring the Convex C220) to working order, and happily runs the Convex Fortran compiler.||A Convex C240, a quad-cpu machine. This machine has not been touched since its arrival (see Convex C240 Arrived), mostly because of its power requirements. Once we've upgraded our lab space and power infrastructure we may give this machine some more attention.|
3rd Generation: Convex C3 (1991)
The C3 (C34x0, C38x0) is yet a faster C1 compatible crossbar-interconnected multi-processor (maximum of 8 cpu's), implemented in GaAs (Gallium Arsenide) technology. It was the first commercially available computer implemented in GaAs.
There are no C3 specimens in the collection, but we do have some C3 related artifacts: Convex C3880.
4th Generation: Convex C4 (1993)
The C4 (C46x0) was a further development of the C3.
There are no C4 specimens in the collection.
5th Generation: Convex Exemplar SPP (1994)
The Exemplar SPP (Scalable Parallel Processor) was a radical departure from the C1-based vector designs. Rather than a small number of complicated vector processors, the Exemplar uses a large number (up to 128) of HP's PA-RISC processors in a ccNUMA (Cache-Coherent Non-Uniform Memory Architecture) cluster. The Exemplar was the first commercially available ccNUMA implementation on the market, and the first system to use SCI (Scalable Coherent Interconnect), which Convex called CTI (Convex Toroidal Interconnect).
An exemplar consists of nodes with up to 8 cpu's each, interconnected by 4 toroidal rings. The processors, memory, CTI interconnects and IO within each node is connected through a crossbar switch. Up to 16 nodes can be connected together to form a single system. The large SPP-1x00/XA ("extended architecture") systems are packaged in man-high towers with rounded sides, each tower holding two nodes and one I/O chassis with disks; the smaller SPP-1x00/CD ("compact design") systems are packaged in a large deskside cabinet with flat sides, containing one node and one I/O chassis.
The first Exemplar system, the SPP-1000 (codenamed Camelot) used 100MHz PA-7100 CPUs, connected to the crossbar switch through a 32-bit bus. The later SPP-1200 and SPP-1600 (codenamed Avalon) systems uses 120MHz PA-7200 CPU's, connected through a 64-bus. The main difference between the SPP-1200 and the SPP-1600 is the SPP-1600's larger cache size (1MB data cache and 1MB instruction cache per CPU) against the SPP-1200's smaller cache size (265KB data cache and 256KB instruction cache).
The SPP generation is present in the collection with five specimens (see Arrival and first look at the Convex SPP's):
|One Convex Exemplar SPP-1200/XA, two nodes with a total of 16 CPUs and 2GB of memory.||One Convex Exemplar SPP-1600/XA, two nodes with a total of 16 CPUs and 4GB of memory. Fully functional - see Fixing and Booting the SPP-1600/XA|
|Two Convex Exemplar SPP-1200/CDs, one complete, and one without skins. Each consists of one node with 8 CPUs. This skinned one runs fine with 6 CPU's and 1.5GB of memory.||One Convex Exemplar SPP-1600/CD, without skins. One node with 8 CPUs.|
Convex becomes HP
As HP was looking to expand its PA-RISC based offerings into the high-end of the market, and as Convex was already offering a high-end machine using PA-RISC processors, HP acquired Convex in 1995.
A newer SPP-based design was released by HP as the SPP-2000, later renamed to HP 9000 S-class (single node) and HP 9000 X-class (multi-node). Later yet, the HP 9000 Superdome was developed based on the SPP design, first using PA-RISC cpu's, and later using Intel Itanium cpu's.